EDN

Product Update: FPGA and PLD Design Tools

The ACTgen Macro Builder is a parameterized macro function generator that enables users to construct highly efficient counters, adders, and other structured blocks. Developed as a productivity and ...
Design-Reuse

Tool vendors Synplicity Inc. and Forte Design Systems Inc. bring system-level tools to PLD masses

SAN MATEO, Calif. — Tool vendors Synplicity Inc. and Forte Design Systems Inc. this week will launch what they call the first system-level design and verification flow for programmable logic device ...
Electronic Design

PLD Family Bridges FPGA And CPLD Needs

These programmable-logic devices combine CPLD flash configurability with an FPGA lookup-table architecture for lower-cost, logic-intensive designs. Applications traditionally supported by high-density ...
Electronic Design

FPGA Has 90K Usable PLD Gates

Radiation hardened for low-earth orbit and launch applications, the new UT4090 RadHard FPGA features 90,000 usable PLD gates, data path speeds of 200 MHz, embedded SRAM and is targeted for QML Q and T ...
Design-Reuse

How the FPGA Came To Be, Did General Electric invent the PLD and EPLD in 1971?

My long running series titled "How the FPGA Came To Be" (referenced below) chronicles the development of programmable logic starting with programmable diode matrices developed and marketed by Harris ...